MIRA
INFORM REPORT
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Report Date : |
20.12.2007 |
IDENTIFICATION
DETAILS
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Name : |
SEMI CONDUCTOR LABORATORY |
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Formaly known as: |
SEMI CONDUCTOR COMPLEX LIMITED |
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Registered Office : |
Sector 72, S A S Nagar, Near Chandigarh-160071, Punjab |
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Country : |
India |
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Financials (as on) : |
31.03.2007 |
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TAN No.: [Tax
Deduction & Collection Account No.] |
PTLS16381B |
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PAN No.: [Permanent
Account No.] |
AAGTS0959N |
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Legal Form : |
Part of Department of Space |
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Line of Business : |
Research Laboratory. |
RATING &
COMMENTS
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MIRA’s Rating : |
A |
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RATING |
STATUS |
PROPOSED CREDIT LINE |
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41-55 |
Ba |
Overall operation is considered normal. Capable to meet normal
commitments. |
Satisfactory |
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Maximum Credit Limit : |
USD 6614992 |
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Status : |
Good |
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Payment Behaviour : |
Regular |
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Litigation : |
Clear |
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Comments : |
Subject is a part of Department of Space, Government of India. Lenders
and Creditors can feel confident about its exposure. Payments are reported as
slow but correct. It can be considered good for business dealings at usual trade terms
and conditions. |
LOCATIONS
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Registered Office : |
Sector 72, S A S Nagar, Near Chandigarh-160071, Punjab, India |
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Tel. No.: |
91-172-2236040/ 5027558 |
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Mobile No.: |
91-9872669118 |
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Fax No.: |
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Website : |
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Branch : |
Second Floor, Core 4, Scope Minar, Luxminagar, Delhi-110092, India |
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Tel. No.: |
91-11-22432127 |
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Fax No.: |
91-11-22422732 |
DIRECTORS
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Name : |
Mrs. Veena S Rao |
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Designation : |
Director |
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Date of Ceasing : |
28.12.2005 |
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Name : |
Dr. R G Nadadur |
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Designation : |
Director |
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Name : |
Mr. K Nagachenchaiah |
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Designation : |
Director |
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Name : |
Mr. M M Sobti (Technical) |
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Designation : |
Director |
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E-Mail : |
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Name : |
Mr. S K Rakesh (Marketing) |
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Designation : |
General Manager |
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E-Mail : |
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Name : |
Mr. S B Sarna |
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Designation : |
General Manager (Systems) |
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E-Mail : |
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Name : |
Mr. Manmohan Singh |
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Designation : |
DGM (ITS) |
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E-Mail : |
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Name : |
Mr. S K Ambardar |
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Designation : |
Head (Facilities) |
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E-Mail : |
KEY EXECUTIVES
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Name : |
Mr. Praveen Bangotra |
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Designation : |
Scientist / Engineer, SE - ITSD |
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Name : |
Mr. Vivek Trehan |
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Designation : |
Company Secretary |
BUSINESS DETAILS
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Line of Business : |
Research Laboratory. |
PRODUCTION STATUS
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Particulars |
Unit |
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Installed
Capacity |
Actual
Production |
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LSI/VLSI
Wafers 6” processing |
Quantity in
millions |
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2 |
0.106 |
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Chip on
Board (COB) / ECB |
Quantity in
millions |
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250 |
36.000 |
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Board Level
Assembly/Sub-systems |
Quantity in
millions |
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20 |
5.051 |
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VLSI
Packaging |
Quantity in
millions |
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100 |
42.231 |
GENERAL
INFORMATION
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No. of Employees : |
539 |
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Bankers : |
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Facilities: |
Secured Loan
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Banking
Relations : |
- |
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Auditors : |
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Name : |
A K Sood and Associates Chartered Accountants |
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Address : |
S C O 50-51, 2nd Floor, Sector 17-A, Chandigarh, Punjab,
India |
CAPITAL STRUCTURE
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Capital Investment : |
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Owned : |
Rs.814.631 Millions |
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Borrowed : |
- |
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Total : |
Rs.814.631 Millions |
FINANCIAL DATA
[all figures are in Rupees Millions]
ABRIDGED BALANCE
SHEET
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SOURCES OF FUNDS |
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31.03.2007 |
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SHAREHOLDERS FUNDS |
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1] Share Capital |
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814.631 |
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2] Share Application Money |
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0.000 |
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3] Reserves & Surplus |
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839.117 |
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4] (Accumulated Losses) |
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0.000 |
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NETWORTH |
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1653.748 |
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LOAN FUNDS |
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1] Secured Loans |
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62.875 |
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2] Unsecured Loans |
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0.000 |
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TOTAL BORROWING |
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62.875 |
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DEFERRED TAX LIABILITIES |
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0.000 |
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TOTAL |
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1716.623 |
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APPLICATION OF FUNDS |
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FIXED ASSETS [Net Block] |
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382.361 |
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Capital work-in-progress |
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10.931 |
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INVESTMENT |
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0.000 |
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DEFERREX TAX ASSETS |
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0.000 |
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CURRENT ASSETS, LOANS & ADVANCES |
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Inventories |
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228.821 |
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Sundry Debtors |
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255.116 |
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Cash & Bank Balances |
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1154.225 |
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Other Current Assets |
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76.291 |
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Loans & Advances |
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139.220 |
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Total
Current Assets |
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1853.673 |
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Less : CURRENT
LIABILITIES & PROVISIONS |
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Current Liabilities |
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530.342 |
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Provisions |
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0.000 |
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Total
Current Liabilities |
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530.342 |
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Net Current Assets |
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1323.331 |
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MISCELLANEOUS EXPENSES |
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0.000 |
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TOTAL |
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1716.623 |
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PROFIT & LOSS
ACCOUNT
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PARTICULARS |
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31.03.2007 |
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Sales Turnover |
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407.311 |
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Other Income |
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0.000 |
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Total Income |
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407.311 |
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Profit/(Loss) Before Tax |
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0.000 |
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Provision for Taxation |
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0.000 |
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Profit/(Loss) After Tax |
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0.000 |
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Imports : |
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Raw Materials |
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15.315 |
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Stores & Spares |
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2.575 |
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Others |
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0.000 |
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Total Imports |
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17.890 |
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Expenditures : |
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Raw Material Consumed |
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98.164 |
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Purchases made for re-sale |
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4.407 |
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Consumption of stores and spares parts |
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48.287 |
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Increase/(Decrease) in Finished Goods |
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2.130 |
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Salaries, Wages, Bonus, etc. |
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87.717 |
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Managerial Remuneration |
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31.326 |
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Payment to Auditors |
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6.667 |
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Interest |
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9.006 |
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Insurance Expenses |
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7.324 |
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Power & Fuel |
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4.611 |
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Depreciation & Amortization |
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107.672 |
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Total Expenditure |
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407.311 |
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KEY RATIOS
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PARTICULARS |
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31.03.2007 |
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PAT / Total Income |
(%) |
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N.A. |
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Net Profit Margin (PBT/Sales) |
(%) |
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N.A. |
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Return on Total Assets (PBT/Total Assets} |
(%) |
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N.A. |
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Return on Investment (ROI) (PBT/Networth) |
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N.A. |
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Debt Equity Ratio (Total Liability/Networth) |
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0.35 |
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Current Ratio (Current Asset/Current Liability) |
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3.49 |
LOCAL AGENCY
FURTHER INFORMATION
DOS, the Administrative Ministry is in the process of restructuring the
company and as part of this exercise, a Society “Semi-Conductor Laboratory” has
been formed by DOS under the Societies Registration Act, 1860. All the assets
and liabilities of Semiconductor Complex Limited will be transferred to
Semi-Conductor Laboratory for which necessary approval from the Competent
Authority has been obtained. The shareholders of the Company & Members of
the Society have also approved the same in their meeting(s) held on 18th
November 2005 and 8th December 2005 respectively. Pursuant to the approval of
the cabinet in its meeting held on 23rd February 2006 the Semiconductor Complex
Limited will be wound-up voluntarily as per the provisions of the Companies
Act, 1956.
Website Details :
SCL-LEADING INDIA'S EFFORT IN MICROELECTRONICS
Subject has always been in sync with the future. It has understood
and appreciated the needs of India, its people and its ever-growing industry.
The last over 20 years tell the saga of Subject's contribution in leading the
national effort in the vital areas of microelectronics.
Subject was set-up in 1983, in the green, unpolluted
environs on the outskirts of Chandigarh - a city designed by the French
architect Le Corbusier, just 250 Kms northwest of the Indian Capital New Delhi.
With its objective to design, develop and manufacture VLSIs and VLSI based systems
and sub systems, and to create a strong R and D base, Subject entered into a
technical collaboration with American Microsystems Inc. USA and in 1984
commenced commercial production in 5 micron CMOS technology. Through intensive
in-house R&D efforts Subject developed and productionised the next
generation 3 micron, 2 micron, 1.2 micron as well as EEPROM and CCD
technologies. More recently, the company has established the 0.8 micron CMOS
technology at its modern 6" wafer fabrication facility. The company has
over the years developed and manufactured a number of key VLSIs for the Telecom
and Industrial sectors.
Subject's vertically integrated
semiconductor operations offer design, wafer fabrication, testing, packaging,
quality assurance and reliability testing, VLSI based system manufacturing and
applications support all under one roof. Within this framework,
Subject places a lot of emphasis on its semiconductor operations - consistently
building on its specialization in areas like Mixed Signal Devices, Micro power
Technology, Digital Signal Processing, etc. This fulfils the demand of its
customers in focus areas without ignoring its growing base of customers in
consumer and industrial electronics.
From single chip to total solutions,
Subject is a one-stop microelectronics organization. Subject offers its
customers total solutions by providing Standard/Application Specific Standard
Products (ASSPs), designing chips from concepts and creating products around
ASICs. Add to this the technical service support, the customers have remarkable
flexibility to interact with Subject at any stage.
VLSI-The Core of
ModERn Electronic Systems
A semiconductor "chip", or integrated circuit, is
a fingernail-size piece of silicon layered precisely with circuitry. These tiny
chips are the enablers of the Information Age, powering the electronic marvels
that have changed the world so dramatically. As the world becomes increasing
technology savvy, the demand for semiconductor IC's is growing.
Much of this demand growth can be attributed to three main
drivers for the advanced chips: communications, consumer applications and
computing. Practically, an integrated circuit is a collection of large number
of transistors (generally MOS transistor) fabricated on a single piece of Silicon
(called die). These transistors are arranged and interconnected in such a way
that they all together perform desired functionality. This art and science of
putting large number of transistors onto small silicon is called (VLSI) Very
Large Scale Integration. Selectively doping and metal layering pure silicon
wafers in special factories called "fabs" or fabrication plants make
IC's. Often referred to as the most sophisticated manufacturing plants in the
world, advanced fabs typically cost around a billion dollars to build and
equip. Today, there are approximately 900 fabs around the world producing
millions of chips every year.
SCL Fabrication Facility at SAS Nagar
But before fabrication, circuit design pattern on silicon needs
to be defined i.e. the areas on silicon which will be processed should be
clearly marked out and remaining areas be masked off. The whole process from
specifications of the required IC to finally generating the masking (or
unmasking) areas position data is known as VLSI Design. VLSI design is further
segmented into "Front end design" and "Back end design".
Since the number of transistors (or MOS devices) is too large to be handled
manually, a number of EDA (Electronic Design Automation) tools are used for
performing the various VLSI design tasks.
India has been known worldwide as a country of highly
professional and gifted IT professionals. Recognizing this fact, major global
semiconductor companies like IBM, Philips, Analog Devices, Motorola, Cypress
Semiconductor, Texas Instruments, ST Microelectronics, Cadence, MOS Chip
Semiconductor, Alliance Semiconductor, Core EL Logic, Lucent Technologies, Sage
Design, Infineon Technologies, Wipro Limited and many more MNCs have
established their Design Houses in India. There is an ever-growing need at both
Indian and MNCs to hire more VLSI design professionals to develop standard IP
(Intellectual Property) cores and customized solutions for an ever-growing
worldwide base of customers. Besides these, in more technology-friendly
countries like USA and Japan, there is a growing dependence on India for
skilled manpower to work on VLSI-design related activities.
ROAD TRAVEL
To travel by bus from New Delhi to Chandigarh a large number
of buses operate from ISBT Kashmiri Gate Maharana Pratap Bus Stand, State
Government Transport Undertakings from Haryana, Punjab, Chandigarh and Himachal
Pradesh ply buses on Chandigarh route. On reaching Sector 17 ISBT one can use
bus route no 13-C from Chandigarh to Sector 71 Phase-8 Mohali. Local bus stand
is located adjacent to the main bus stand. Auto-Rikshaw service is also
available from Chandigarh to SCL Mohali.
Introduction:
Semiconductor complex limited was established
as a company in 1983 under the companies Act, 1956, to achieve self-reliance in
the strategic area of Integranted circuit technology / micro-electronics.
Company was meeting the microelectronics requirement of the country in a
limited way. In 2002, the company was identified as the national foundry for
MEMS under the national programme on smart materials.
Subject company was not in a position to make
profit due to low volume of business and it was unviable to operate the company
purely on commercial considerations given the difficulties faced by it in terms
of:
- Technological Obsolscence;
- Long product development cycle because interruption in the absence
of redundancy in fabrication line;
- Small and fragmented india market
- Fierce competition from overseas companies.
Since the volume of business was not adequate,
the company was incurring losses, leading to depletion of its working capital
and operational capability.
The Government of india transferred
administrative control of the company from the department of information
technology to the department of space effective from March 01, 2005, In order
to restructure the company and to have synergy with the indian space research
organization, the department of space formed Subject as a society and
registered the same on November 08.2005, under the societies registration Act,
1860, as amended by the punjab amendment Act, 1957, with emphasis on research
and development in the field of microelectroics. The Subject society become
operation from September 01.2006, with all assets and liabilities, tangible or
intangible, movable or immovable, contingent or otherwise, including all
rights, obligations, commitments, lien, contract, agreements, memoranda of
understanding, whatsoever, transferred to it. The Subject company is being
wound up voluntarily as per the provision of the compaies Act, 1956.
The main objective of the society as enshrined
in its memoradum of association is to undertake, aid promote guide and
coordinate reserch in the field of semiconductor technology, Micro electro
mechanical systems and process technologies relating to subject processing.
The society in line with the objectives,
carried out its activities upon becoming operational on 01.09.2006.
Technical Activities:
The technical activities of Subject are
carried out in the following areas:
- VLSI and MEMS Fabrication, Assembly and Testing
- VLSI Design and process development
- Systems Engineering and Assembly
- Screening of components and Hi – Reliability Fabrication
- Information Technology Services
- Technical Support Services
A brief on each of the above activities
carried out during the perioed is given as under:
VLSI and MEMS Fabrication, Assembly and Testing
In the VLSI division, the development and
manufacturer of ASICs continued to be the major thrust. About 40.000 MANAS
chips were manufactured and delivered to SINP, Kolkata for used in an
international project at CERN, Geneva. Phase – I of a Read out integrated
circuit (8*8 ROIC array) for quantum well infrared photo detector (QWIP) has
been completed. Wafer production for supply of a set of ASICs have been
qualified for usage in the locomotive control applications. Processing of wafer
lots for FTI and TDI devices also continued.
Activities for the development of MEMS based
products were continued. Development of RFMEMS and design of newer versions of
pressure sensore for low pressure applications were initiated. Work on the
qualification of new MEMS processes was continued. Packaging and delivery of FM
TTL clock driver devices (1W and 3W) to SAC Ahmedabad was completed.prototype
phase of CCDs namely TDI and FTI for SAC, Ahmedabad and LEOS, Bangalore
respectively has been completed.
Process qualification for diode array
encapsulation project has been completed and FM device assembly will be taken
up in due course. Ceramic assembly line has been qualified by ISAC for assembly
of flight model devices and assembly of these devices for qualification is
under progress. After the packaged devices are qualified, ISAC has plans to get
the packaging of various FM devices at Subject . It is envisaged that packaging
pf 125k Qaw – ECBs shall be completed during the current financial year and
200k are projected for next financial year.Packaging of various other devices
such as PSP for BEL., Softdas (Data Capture from sensors for On-Board Launch
Vehicle Applications), ADC (Analog to Digital Converter), DAC (Digital to
Analog Converter), PCA (Protocol Controller ASIC), SPIC (Stage Processing IC),
SRAM for VSSC, VPL (Video Processing Logic), Timing Sequencer RAD Hard, RTX
Glue Logic, etc. Would also be complted during the year. Assembly of
Hi-Reliability electronic packages for space Hardware Boards has commenced and
would continue in the following years.
R and D Process Development:
A0.8
Micro radiation hardened proces is being developed. A prototype circuit, namely
sequernce controller has been fabricated. Pre – rad testinh of the device
exhibited larghe off-state leakage current which was process related. In order
to avoid this leakage, a new making step has been designed and introduced in
the fabrication process flow. A new batch of sequence controller is being
fabricated using this modified process flow. Radition tolerant device
structures such as extended and enclosed gate transistirs have been fabricated
in converntional process and these structure have been found to be radiation
tolerant up to 60 krad (si).
Fabrication of test chip containing structure
for characterizing high resstance poly silicon in the standard 0.8 mircon
process is underway.
The process for area CCD image sensor has been
finalized and prototype IK*IK frame transfer lmaging devicess have been
developed. Of the two type of developed. Of the two and of devices developed,
Viz.. MPP and conventional device, the latter has been selected for flight
model development. Trial lots with process and mask modification to identify
the specific are being fabricated. A feasibility study of 0.8 micro proces for
the development of CMOS based imagers is underway.
Reliability and Quality Assurance:
Reliability and Quality Assurance Division has
been set up to enhance the scope of reliability and quality assurance
activities including environment testing of devices manufactured in-house as
well screening and qualification of devices /sub systems as per MIL STD –
883/Space grade requirements. In-process quality Audits, Failure Analysis,
Reliability Prediction; Implementation of ESD control Programme’ Quality
Control and qualification of assembly, Packaging, Test and Screering Process,
Calibration of Equipment and incomming material inspection activities and
documentation are the major activitiesundertaken. The division completed
screening of 500 flight worthy clock driver devices for the space programme and
steps have been taken to enhance the screening capacity by almost tenfold for
Railway ASICs. Long TDI imager devices to conduct constant acceleration test at
10.000g is another major initiative taken up with LPSC.
IT Services
Information Technology Services Division
(ITSD) offers in –house IT services, IT Projects Marketing and coordination
services for hardware software solutions and education and training programme.
ITSD implemented the integrated access control
(Tripod Turnsile gates) and Time attendance system. The Smart Cards for the
employees were personalized and printed in house. This system has been extended
to the students and visitors etc. Plastic cards were also personalized and
issued under the medical scheme. Activities relating to administrative and
maintenance of intranet email servicess were continued. Proposal to upgrade the
network backbone has been initiated. The existing web site of the society has
been revemped to reflect the change after restrucring of SCL from company to
society. A proposal to install and maintain an X-Ray Baggage inspection system
is under implementation.
ITSD also excuted a project of smart card
based access contrial system for 52 district officers of Food corporation of
india as part of IT projects marketing
and coordination services. Discussions were also continued with ministry of
overseas indian affairs for smart cart based e-governance solution for
emigrants of pilot project for multipurpose National ID card.
As part of its education and training
programme, ITSD offers courses in VLSI design and industrial training programme
for engineering and management students. A number of studenthave been placed in
various reputed companies after compus interviews.
Technical Support Services:
The Technical Support services under the
facilities division of SCL essentially comprise of various utilities meeting
requipmrnt of production and other areas. Ultra High pure systems (DI Water,
Bulk Gases – N2, O2, H2, Specialty gases), Air management system for clean
rooms and other areas., facilities control and monitoring systems (FCMS) for
monitoring and controlling clean room parameters on a real time basis,
electrical (Dedicated 66kv supple for reible power with minimal brown-outs and
power outges), Clean Compressed DRY Air Process Vacuum System, Exhaust and Gas
abatement System, Waste Management System and fire and safety System are the
major utility plants systems in the society.
All the utilities plants sytem are operated on
a 24*7*365 basis to cater to the needs of wafer fabrication operation which
require continuous supply of various utilities. The maintenance activities
encompassing preventive, predicitive and breakdoen maintenance were carried out
as per the set schedule utilizing mostly the in-house resoueces. Apart from the
operations and maintenance of the above plants systems, provision of utilities
in new facilities like screening, Hi – Reliability fabrication etc. was made in
line with defined quqlity standards.
All the fire fightinh detection insta;llations
were periodically checked for their smooth and reliable operations. Mock fire
drills were conducted by the fire wing personnel. Refreshre course on fire and
safty aspects were Conducted for the employees on a regular basis. For Setting
up of in – house fire wing, training was imparted to about 24 employees who had
opted to join fire services wing.
Housing
The foundation stone of the SCL housing
complex silicon enclave was laid by the chirman, SCL management
council/Secretary, Deptt. Of Space on july 28, 2007, After approval of the
plants by the local authority, Construction activity would be initiated in a
phased manner.
Welfare Schemes
The Vikram A. Sarabhai Trust (VAST) under the
agis of the department of space extended the VAST insurance scheme, Whenever
Accident Strikes (VISWAS) and the scheme for assistance to families in exigency
(SAFE) to the society employees. Most of the society employees have joined
these schemes.
Capitalisation:
Government of india, Dept. of Space has
released grants:
Revenue grant of Rs.270.000 Millions for the
year 2006-07 (out of this Rs.70.000 Millions received during the perioed
01.09.2006 to 31.03.2007)
Capital grants of Rs.772.000 Millions received
during 01.04.2006 to 31.03.2007 for augmentation/up gradation of micro
electronics fabrication out of which Rs.2.687 Millions has been utilized and
balance unutilized grant of Rs.769.313 Millions along with intrest thereon of
Rs.67.339 Millions has been depicted in schedual No.2 of the balance sheet.
Preamble
Subject - formerly known as Semiconductor Complex Limited,
established in 1983) is now a Society (registered on 08.11.2005 under the
Societies Registration Act, 1860, as amended by Punjab Amendment Act, 1957),
with the main objective to undertake, aid, promote, guide and co-ordinate
Research and Development in the field of semiconductor technology, Micro
Electro Mechanical Systems and process technologies relating to semiconductor
processing.
Subject through its in-house R and D efforts has developed 3 micron, 2
micron, 1.2 micron and 0.8 micron CMOS technologies as well specialized
technologies such as EEPROM and CCD. SCL has over the years developed and
supplied a number of key VLSIs, majority of which have been Application
Specific Integrated Circuits (ASICs) for high reliability and industrial
applications.
Vision
- Create a strong R and D base in the country in the field of
microelectronics.
- Design and Development of devices in cutting edge technology.
- Manufacture VLSI/MEMS based systems and sub-systems.
- Transform SCL as a Centre of Excellence in microelectronics in the
country
Composition
of the Society
- Secretary to the Government of India,
Department of Space, Bangalore =
President
- Secretary to the Government of India,
Department of Atomic Energy,
Mumbai = Member
- Secretary to the Government of India,
Department of Information Technology,
New Delhi = Member
- Secretary to the Government of India,
Department of Defence Research and Development, New Delhi =
Member
- Additional Secretary and Internal Financial Adviser,
Department of Space, Bangalore = Member
- Director,
Semi-Conductor Laboratory,
Chandigarh = Member
- Dr. B.N. Suresh, Director
Vikram Sarabhai Space Centre,
Thiruvananthapuram = Member
- Dr. Chandrashekhar, Director
Central Electronics Engineering
Research Institute (CEERI), Pilani = Member
- Prof. S.L. Lahiri
Deptt.
of Electronics and Telecommunications Engineering,
Indian Institute of Technology, Kharagpur = Member
Composition
of the Management Council
- Secretary to the Government of India,
Department of Space,
Bangalore = Chairman
- Director,
Semi-Conductor Laboratory,
Chandigarh = Member
- Secretary to the Government of India,
Department of Atomic Energy,
Mumbai = Member
- Secretary to the Government of India,
Department of Defence Research
and Development, New Delhi = Member
- Additional Secretary or Joint Secretary to the Govt. of India,
Department of Space, Bangalore =
Member
- Shri S. Satish, Deputy Director,
DOQR/ISRO HQs., Bangalor =
Member
- Chief Executive Officer, SITAR
Defence Research and Development
Organisation, Bangalore = Member
- Shri M.M. Sobti, Scientist/Engineer 'H',
Semi-Conductor Laboratory,
Chandigarh = Member
- Shri John P. Zacharaiah, Deputy Director,
MVIT/VSSC,
Thiruvananthapuram = Member
Fixed Assets:
- Land Freehold
- Building
- Plant and Machinery
- Furniture and Fittings
- Vehicles
- Grant Assest
CMT REPORT
(Corruption, Money Laundering & Terrorism]
The Public Notice information has been collected from various sources
including but not limited to: The Courts, India Prisons Service,
Interpol, etc.
1] INFORMATION ON DESIGNATED
PARTY
No exist designating subject or any of its beneficial owners,
controlling shareholders or senior officers as terrorist or terrorist
organization or whom notice had been received that all financial transactions
involving their assets have been blocked or convicted, found guilty or against
whom a judgement or order had been entered in a proceedings for violating
money-laundering, anti-corruption or bribery or international economic or
anti-terrorism sanction laws or whose assets were seized, blocked, frozen or
ordered forfeited for violation of money laundering or international
anti-terrorism laws.
2] Court Declaration :
No records exist to suggest that subject is
or was the subject of any formal or informal allegations, prosecutions or other
official proceeding for making any prohibited payments or other improper
payments to government officials for engaging in prohibited transactions or
with designated parties.
3] Asset Declaration :
No records exist to suggest that the property or assets of the subject
are derived from criminal conduct or a prohibited transaction.
4] Record on Financial
Crime :
Charges or conviction
registered against subject: None
5] Records on Violation of
Anti-Corruption Laws :
Charges or
investigation registered against subject: None
6] Records on Int’l
Anti-Money Laundering Laws/Standards :
Charges or
investigation registered against subject: None
7] Criminal Records
No
available information exist that suggest that subject or any of its principals
have been formally charged or convicted by a competent governmental authority
for any financial crime or under any formal investigation by a competent
government authority for any violation of anti-corruption laws or international
anti-money laundering laws or standard.
8] Affiliation with
Government :
No record
exists to suggest that any director or indirect owners, controlling
shareholders, director, officer or employee of the company is a government
official or a family member or close business associate of a Government
official.
9] Compensation Package :
Our market
survey revealed that the amount of compensation sought by the subject is fair
and reasonable and comparable to compensation paid to others for similar
services.
10] Press Report :
No press reports / filings exists on
the subject.
CORPORATE
GOVERNANCE
MIRA INFORM as part of its Due Diligence do provide comments on
Corporate Governance to identify management and governance. These factors often
have been predictive and in some cases have created vulnerabilities to credit
deterioration.
Our Governance Assessment focuses principally on the interactions
between a company’s management, its Board of Directors, Shareholders and other
financial stakeholders.
CONTRAVENTION
Subject is not known to have contravened any existing local laws,
regulations or policies that prohibit, restrict or otherwise affect the terms
and conditions that could be included in the agreement with the subject.
FOREIGN EXCHANGE
RATES
|
Currency |
Unit
|
Indian Rupees |
|
US Dollar |
1 |
Rs.39.55 |
|
UK Pound |
1 |
Rs.79.62 |
|
Euro |
1 |
Rs.57.02 |
SCORE & RATING
EXPLANATIONS
|
SCORE FACTORS |
RANGE |
POINTS |
|
HISTORY |
1~10 |
7 |
|
PAID-UP CAPITAL |
1~10 |
7 |
|
OPERATING SCALE |
1~10 |
7 |
|
FINANCIAL CONDITION |
|
|
|
--BUSINESS SCALE |
1~10 |
9 |
|
--PROFITABILIRY |
1~10 |
6 |
|
--LIQUIDITY |
1~10 |
7 |
|
--LEVERAGE |
1~10 |
7 |
|
--RESERVES |
1~10 |
7 |
|
--CREDIT LINES |
1~10 |
7 |
|
--MARGINS |
-5~5 |
- |
|
DEMERIT POINTS |
|
|
|
--BANK CHARGES |
YES/NO |
YES |
|
--LITIGATION |
YES/NO |
NO |
|
--OTHER ADVERSE INFORMATION |
YES/NO |
NO |
|
MERIT POINTS |
|
|
|
--SOLE DISTRIBUTORSHIP |
YES/NO |
NO |
|
--EXPORT ACTIVITIES |
YES/NO |
NO |
|
--AFFILIATION |
YES/NO |
YES |
|
--LISTED |
YES/NO |
NO |
|
--OTHER MERIT FACTORS |
YES/NO |
YES |
|
TOTAL |
|
64 |
This score serves as a reference to assess SC’s credit risk
and to set the amount of credit to be extended. It is calculated from a composite
of weighted scores obtained from each of the major sections of this report. The
assessed factors and their relative weights (as indicated through %) are as
follows:
Financial
condition (40%) Ownership
background (20%) Payment
record (10%)
Credit history
(10%) Market trend
(10%) Operational
size (10%)
RATING
EXPLANATIONS
|
RATING |
STATUS |
PROPOSED CREDIT LINE |
|
|
>86 |
Aaa |
Possesses an extremely sound financial base with the strongest capability
for timely payment of interest and principal sums |
Unlimited |
|
71-85 |
Aa |
Possesses adequate working capital. No caution needed for credit
transaction. It has above average (strong) capability for payment of interest
and principal sums |
Large |
|
56-70 |
A |
Financial & operational base are regarded healthy. General
unfavourable factors will not cause fatal effect. Satisfactory capability for
payment of interest and principal sums |
Fairly Large |
|
41-55 |
Ba |
Overall operation is considered normal. Capable to meet normal
commitments. |
Satisfactory |
|
26-40 |
B |
Unfavourable & favourable factors carry similar weight in credit
consideration. Capability to overcome financial difficulties seems
comparatively below average/normal. |
Small |
|
11-25 |
Ca |
Adverse factors are apparent. Repayment of interest and principal sums
in default or expected to be in default upon maturity |
Limited with
full security |
|
<10 |
C |
Absolute credit risk exists. Caution needed to be exercised |
Credit not
recommended |
|
NR |
In view of the lack of information, we have no basis upon which to
recommend credit dealings |
No Rating |
|